A conventional semiconductor package having a semiconductor chip encapsulated by an encapsulant is concerned with efficient dissipation of heat generated by the chip during operation, so as to assure the lifetime and quality of the semiconductor package.
However, as the encapsulant for enclosing the semiconductor chip is made of a molding compound e.g. epoxy resin that is poor in thermal conductivity, the heat generated by the chip is unable to be effectively dissipated through the encapsulant. Accordingly, a metallic heat sink or heat block is incorporated in the semiconductor package for improving the heat-dissipating efficiency. However, it is undesirable if the heat sink is entirely encapsulated by the encapsulant, in which the generated heat still needs to pass through the encapsulant for dissipation, limiting the improvement in the heat-dissipating efficiency. Therefore, it is preferable to construct a semiconductor package having a surface of the heat sink exposed to the atmosphere, allowing the generated heat to be directly dissipated through the exposed surface. Nevertheless, if the heat sink is not in direct contact with the chip, while the molding compound is filled in a space between the heat sink and the chip, the heat dissipation will be undesirably impeded due to the heat generated by the chip unable to be effectively transmitted to the heat sink.
Thus, U.S. Pat. Nos. 5,726,079 and 5,471,366 respectively disclose a semiconductor package illustrated in FIG. 8 The semiconductor package 1 has a heat sink 11 directly attached to a chip 10, while a top surface 110 of the heat sink 11 is exposed to the outside of an encapsulant 12 used for encapsulating the chip 10. With the direct contact between the chip 10 and the heat sink 11, and between the exposed top surface 110 of the heat sink 11 and the atmosphere, heat generated by the chip 10 can be directly transmitted to the heat sink 11 for dissipation without passing through the encapsulant 12. This makes the semiconductor package 1 have better heat-dissipating efficiency than the one as previously recited.
Nevertheless, some drawbacks have been found for the semiconductor package 1 in fabrication. First, while the chip 10 together with the heat sink 11 are placed in a mold cavity in a molding process, the top surface 110 of the heat sink 11 should closely abut a top wall of the mold cavity for preventing a molding resin from flashing on the top surface 110 of the heat sink 11. Alternatively, if there is a gap formed between the top surface 110 of heat sink 11 and the top wall of the mold cavity, resin flash occurs on the top surface 110 of the heat sink 11, making a fabricated product deteriorated in profile and in heat-dissipating efficiency, and subsequently a deflash process is definitely required. However, the flash process is undesirably time-consuming and cost-ineffective, even possibly causing damage to the fabricated product. On the other hand, if the heat sink 11 abuts the top wall of the mold cavity too closely, excessive clamping force from the mold cavity will crack the fragile chip 10 beneath the heat sink 11.
Furthermore, an adhesive or laminating tape used in the attachment of the heat sink 11 to the chip 10 is usually made of a thermosetting material, which remains soft before being heated for curing. This makes the structure of the chip 10 combined with the heat sink 11 not precisely controlled in height, thus inducing the foregoing problem of the top surface 110 of the heat sink 11 not appropriately abutting the top wall of the mold cavity. As a result, the fabricated product can not be assured in quality as well as not cost-effective in fabrication.
Furthermore, due to lack of preciseness in the height controlling as mentioned above, the attachment of the heat sink 11 to the chip 10 can not be accomplished in a batch-type manner in the molding process for the semiconductor package 1. That is, the heat sink 11 must be attached to its corresponding chip 10 one by one. This obviously increases the complexity and time consumption for the molding process.
In addition, the heat-dissipating efficiency of the semiconductor package 1 is proportional to the exposed surface area of the heat sink 11. That is, with the semiconductor package 1 remained constant in dimension, the heat sink 11 can be made to maximize the exposed surface area for providing optimal heat-dissipating efficiency. However, in the case of the heat sink is dimensioned to be identical in surface area to the semiconductor package, if the heat sink is not precisely made, the heat sink can not be placed into the mold cavity properly when the heat sink is over-sized, while resin flash tends to occur on the top surface and side surfaces of the heat sink when the heat sink is insufficiently dimensioned.